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november 2007 rev 6 1/24 1 m48z35av 5.0v or 3.3v, 256kbit (32kbit x 8) zeropower ? sram features integrated, ultra low power sram, power-fail control circuit, and battery read cycle time equals write cycle time battery low flag (bok ) automatic power-fail chip deselect and write protection write protect voltage: (v pfd = power-fail de select voltage) ? m48z35av: 2.7v v pfd 3.0v self-contained batter y in the caphat? dip package packaging includes a 28-lead soic and snaphat ? top (to be ordered separately) pin and function compatible with jedec standard 32kbit x 8 srams soic package provides direct connection for a snaphat top which contains the battery rohs compliant ? lead-free second level interconnect 28 1 28 1 pcdip28 (pc) battery caphat snaphat (sh) battery soh28 (mh) www.st.com
contents m48z35av 2/24 contents 1 summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 data retention mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4 v cc noise and negative going transients . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
m48z35av list of tables 3/24 list of tables table 1. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. read mode ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. write mode ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 5. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 6. operating and ac measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 7. capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 8. dc characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 9. power down/up ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 6 table 10. power down/up trip points dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 11. pmdip28 ? 28-pin plastic dip, battery caphat?, pack. mech. data. . . . . . . . . . . . . . . . 18 table 12. soh28 ? 28-lead plastic small outline, battery snaphat, pack. mech. data . . . . . . . . . . 19 table 13. sh ? 4-pin snaphat housing for 48mah battery, pack. mech. data . . . . . . . . . . . . . . . . 20 table 14. sh ? 4-pin snaphat housing for 120 mah battery, pack. mech. data . . . . . . . . . . . . . . . 21 table 15. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 16. snaphat battery table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 17. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
list of figures m48z35av 4/24 list of figures figure 1. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. dip connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. soic connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. read mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. write enable controlled, write mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 7. chip enable controlled, write mode ac waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. bok check routine example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 9. supply voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. ac measurement load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. power down/up mode ac waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 12. pcdip28 ? 28-pin plastic dip, battery caphat?, package outline . . . . . . . . . . . . . . . . . 18 figure 13. soh28 ? 28-lead plastic small outline, battery snaphat, package outline . . . . . . . . . . . 19 figure 14. sh ? 4-pin snaphat housing for 48mah battery, package outline. . . . . . . . . . . . . . . . . . 20 figure 15. sh ? 4-pin snaphat housing for 120mah battery, package outline. . . . . . . . . . . . . . . . . 21
m48z35av summary 5/24 1 summary the m48z35av zeropower ? ram is a 32kbit x 8, non-volat ile static ram th at integrates power-fail deselect circuitry and battery control logic on a single die. the monolithic chip is available in two special packages to provide a highly integrated battery backed-up memory solution. the m48z35av is a non-volatile pin and function equivalent to any jedec standard 32k x8 sram. it also easily fits into many rom, eprom, and eeprom sockets, providing the non-volatility of proms without any requirement for special wr ite timing or limitations on the number of writes that can be performed. the 28 pin 600mil dip caphat? houses the m48z35av silicon with a long life lit hium button cell in a single package. the 28-pin, 330mil soic provides sockets with gol d plated contacts at both ends for direct connection to a separate snaphat ? housing containing the battery. the unique design allows the snaphat battery package to be mounted on top of the soic package after the completion of the surface mount process. insertion of the snaphat housing after reflow prevents potential battery damage due to the high temperatures required for device surface- mounting. the snaphat housing is keyed to prevent reverse insertion. the soic and battery packages are shipped separately in plastic anti-static tubes or in tape & reel form. for the 28-lead soic, the battery package (e.g., snaphat) part number is ?m4z28- br00sh1.? figure 1. logic diagram ai02781b 15 a0-a14 w dq0-dq7 v cc m48z35av g v ss 8 e
summary m48z35av 6/24 table 1. signal names figure 2. dip connections figure 3. soic connections a0-a14 address inputs dq0-dq7 data inputs / outputs e chip enable input g output enable input w write enable input v cc supply voltage v ss ground a1 a0 dq0 a7 a4 a3 a2 a6 a5 a13 a10 a8 a9 dq7 w a11 g e dq5 dq1 dq2 dq3 v ss dq4 dq6 a12 a14 v cc ai02782b m48z35av 8 1 2 3 4 5 6 7 9 10 11 12 13 14 16 15 28 27 26 25 24 23 22 21 20 19 18 17 ai02783 8 2 3 4 5 6 7 9 10 11 12 13 14 22 21 20 19 18 17 16 15 28 27 26 25 24 23 1 a1 a0 dq0 a7 a4 a3 a2 a6 a5 a13 a10 a8 a9 dq7 w a11 g e dq5 dq1 dq2 dq3 v ss dq4 dq6 a12 a14 v cc m48z35av
m48z35av summary 7/24 figure 4. block diagram ai01619b lithium cell v pfd v cc v ss voltage sense and switching circuitry 32k x 8 sram array a0-a14 dq0-dq7 e w g power
operating modes m48z35av 8/24 2 operating modes the m48z35av also has its own power-fail dete ct circuit. the control circuitry constantly monitors the single power supply for an out of tolerance condition. when v cc is out of tolerance, the circuit write protects the sram, providing a high degree of data security in the midst of unpredictable system operation brought on by low v cc . as v cc falls below approximately v so , the control circuitry connects the battery which maintains data until valid power returns. table 2. operating modes note: x = v ih or v il ; v so = battery back-up switchover voltage. 2.1 read mode the m48z35av is in the read mode whenever w (write enable) is high, e (chip enable) is low. the device architecture allows ripple-through access of data from eight of 264,144 locations in the static storage array. thus, the unique address specified by the 15 address inputs defines which one of the 32,768 bytes of data is to be accessed. valid data will be available at the data i/o pins within address access time (t avqv ) after the last address input signal is stable, providing that the e and g access times are also satisfied. if the e and g access times are not met, valid data will be available after the latter of the chip enable access time (t elqv ) or output enable access time (t glqv ). the state of the eight three-state data i/o signals is controlled by e and g . if the outputs are activated before t avqv , the data lines will be driven to an indete rminate state until t avqv . if the address inputs are changed while e and g remain active, output data will remain valid for output data hold time (t axqx ) but will go indeterminate until the next address access. mode v cc e g w dq0-dq7 power deselect 3.0 to 3.6v v ih x x high z standby write v il xv il d in active read v il v il v ih d out active read v il v ih v ih high z active deselect v so to v pfd (min) (1) 1. see table 10 on page 17 for details. x x x high z cmos standby deselect v so (1) x x x high z battery back-up mode
m48z35av operating modes 9/24 figure 5. read mode ac waveforms note: write enable (w ) = high. table 3. read mode ac characteristics 2.2 write mode the m48z35av is in the write mode whenever w and e are low. the start of a write is referenced from the latter occurring falling edge of w or e . a write is terminated by the earlier rising edge of w or e . the addresses must be held valid throughout the cycle. e or w must return high for a minimum of t ehax from chip enable or t whax from write enable prior to the initiation of another read or write cycle. data-in must be valid t dvwh prior to the end of write and remain valid for t whdx afterward. g should be kept high during symbol parameter (1) 1. valid for ambient operating temperature: t a = 0 to 70c; v cc = 3.0 to 3.6v (except where noted). m48z35av unit ?100 min max t avav read cycle time 100 ns t avqv address valid to output valid 100 ns t elqv chip enable low to output valid 100 ns t glqv output enable low to output valid 50 ns t elqx (2) 2. c l = 5pf (see figure 10 on page 15 ). chip enable low to output transition 10 ns t glqx (2) output enable low to output transition 5 ns t ehqz (2) chip enable high to output hi-z 50 ns t ghqz (2) output enable high to output hi-z 40 ns t axqx address transition to output transition 10 ns ai00925 tavav tavqv taxqx telqv telqx tehqz tglqv tglqx tghqz valid a0-a14 e g dq0-dq7 valid
operating modes m48z35av 10/24 write cycles to avoid bus contention; although, if the output bus has been activated by a low on e and g , a low on w will disable the outputs t wlqz after w falls. figure 6. write enable controlled, write mode ac waveforms figure 7. chip enable controlled, write mode ac waveforms ai00926 tavav twhax tdvwh data input a0-a14 e w dq0-dq7 valid tavwh tavel twlwh tavwl twlqz twhdx twhqx ai00927 tavav tehax tdveh a0-a14 e w dq0-dq7 valid taveh tavel tavwl teleh tehdx data input
m48z35av operating modes 11/24 table 4. write mode ac characteristics 2.3 data retention mode with valid v cc applied, the m48z35av operates as a conventional bytewide? static ram. should the supply voltage decay, the ra m will automatically power-fail deselect, write protecting itself when v cc falls within the v pfd (max), v pfd (min) window. all outputs become high impedance, and all inputs are treated as ?don't care.? note: a power failure during a write cycle may corr upt data at the curren tly addressed location, but does not jeopardize the rest of the ram's content. at voltages below v pfd (min), the user can be assured the memory will be in a write protected state, provided the v cc fall time is not less than t f . the m48z35av may respond to transient noise spikes on v cc that reach into the deselect window during the time the device is sampling v cc . therefore, decoupling of the power supply lines is recommended. when v cc drops below v so , the control circuit switches power to the internal battery which preserves data. the internal button cell will maintain data in the m48z35av for an accumulated period of at least 10 years (at 25c) when v cc is less than v so . as system power returns and v cc rises above v so , the battery is disconnected, and the power supply is switched to external v cc . write protection continues until v cc reaches v pfd (min) plus t rec (min). normal ram operation can resume t rec after v cc exceeds v pfd (max). symbol parameter (1) 1. valid for ambient operating temperature: t a = 0 to 70c; v cc = 3.0 to 3.6v (except where noted). m48z35av unit ?100 min max t avav write cycle time 100 ns t avwl address valid to write enable low 0 ns t avel address valid to chip enable low 0 ns t wlwh write enable pulse width 80 ns t eleh chip enable low to chip enable high 80 ns t whax write enable high to address transition 10 ns t ehax chip enable high to address transition 10 ns t dvwh input valid to write enable high 50 ns t dveh input valid to chip enable high 50 ns t whdx write enable high to input transition 5 ns t ehdx chip enable high to input transition 5 ns t wlqz (2)(3) 2. c l = 5pf (see figure 10 on page 15 ). 3. if e goes low simultaneously with w going low, the outputs remain in the high impedance state. write enable low to output hi-z 50 ns t avwh address valid to write enable high 80 ns t aveh address valid to chip enable high 80 ns t whqx (2)(3) write enable high to output transition 10 ns
operating modes m48z35av 12/24 also, as v cc rises, the battery voltage is checked. if the voltage is less than approximately 2.5v, an internal battery not ok (bok ) flag will be set. the bok flag can be checked after power up. if the bok flag is set, the first write attemp ted will be blocked. the flag is automatically cleared after the first write, and normal ram operation resumes. figure 8 illustrates how a bok check routine could be structured. for more information on battery storage life refer to the application note an1012. figure 8. bok check routine example read data at any address ai00607 is data complement of first read? (battery ok) power-up yes no write data complement back to same address read data at same address again notify system of low battery (data may be corrupted) write original data back to same address (battery low) continue
m48z35av operating modes 13/24 2.4 v cc noise and negative going transients i cc transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the v cc bus. these transients can be reduced if capacitors are used to store energy which stabilizes the v cc bus. the energy stored in the bypass capacitors will be released as low goin g spikes are generated or energy will be absorbed when overshoots occur. a ceramic bypass capacitor value of 0.1f (see figure 9 ) is recommended in order to provide the needed filtering. in addition to transients that are caused by normal sram operation, power cycling can generate negative voltage spikes on v cc that drive it to values below v ss by as much as one volt. these negative spikes can cause data corruption in the sram while in battery backup mode. to protect from these voltage spikes, st recommends connecting a schottky diode from v cc to v ss (cathode connected to v cc , anode to v ss ). (schottky diode 1n5817 is recommended for through hole and mbrs120t3 is recommended for surface mount). figure 9. supply voltage protection ai02169 v cc 0.1 f device v cc v ss
maximum rating m48z35av 14/24 3 maximum rating stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 5. absolute maximum ratings caution: negative undershoots below ?0.3v are not allowed on any pin while in the battery back-up mode. caution: do not wave solder soic to avoid damaging snaphat sockets. symbol parameter value unit t a ambient operating temperature 0 to 70 c t stg storage temperature (v cc off, oscillator off) snaphat ? top ?40 to 85 c caphat ? dip ?40 to 85 c soic ?55 to 125 c t sld (1)(2) 1. for dip package: soldering temperature not to exc eed 260c for 10 seconds (total thermal budget not to exceed 150c for longer than 30 seconds). 2. for so package, lead-free (pb-free) lead finish: reflow at peak tem perature of 260c (total thermal budget not to exceed 245c for greater than 30 seconds). lead solder temperature for 10 seconds 260 c v io input or output vo ltages ?0.3 to 4.6 v v cc supply voltage ?0.3 to 4.6 v i o output current 20 ma p d power dissipation 1 w
m48z35av dc and ac parameters 15/24 4 dc and ac parameters this section summarizes the operating and measurement conditions, as well as the dc and ac characteristics of the device. the parameters in the following dc and ac characteristic tables are derived from tests performed under the measurement conditions listed in ta b l e 6 : operating and ac measurement conditions . designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. table 6. operating and ac measurement conditions note: output hi-z is defined as the point where data is no longer driven. figure 10. ac measurement load circuit note: 50pf for m48z35av. table 7. capacitance parameter m48z35av unit supply voltage (v cc ) 3.0 to 3.6 v ambient operating temperature (t a ) 0 to 70 c load capacitance (c l )50pf input rise and fall times 5ns input pulse voltages 0 to 3 v input and output timing ref. voltages 1.5 v ai03211 c l = 100pf or 5pf c l includes jig capacitance 645 device under test 1.75v symbol parameter (1)(2) 1. effective capacitance measured with power supply at 5v. sampled only, not 100% tested. 2. at 25c, f = 1mhz. min max unit c in input capacitance 10 pf c io (3) 3. outputs deselected. input / output capacitance 10 pf
dc and ac parameters m48z35av 16/24 table 8. dc characteristics figure 11. power down/up mode ac waveforms table 9. power down/up ac characteristics symbol parameter test condition (1) 1. valid for ambient operating temperature: t a = 0 to 70c; v cc = 3.0 to 3.6v (except where noted). min max unit i li (2) 2. outputs deselected. input leakage current 0v v in v cc 1 a i lo ((2) output leakage current 0v v out v cc 5 a i cc supply current outputs open 50 ma i cc1 supply current (ttl standby) e = v ih 3ma i cc2 supply current (cmos standby) e = v cc ? 0.2v 3 ma v il input low voltage ?0.3 0.8 v v ih input high voltage 2.2 v cc + 0.3 v v ol output low voltage i ol = 2.1ma 0.4 v v oh output high voltage i oh = ?1ma 2.4 v symbol parameter (1) 1. valid for ambient operating temperature: t a = 0 to 70c; v cc = 3.0 to 3.6v (except where noted). min max unit t pd e or w at v ih before power down 0 s t f (2) 2. v pfd (max) to v pfd (min) fall time of less than t f may result in deselection/write prot ection not occurring until 200s after v cc passes v pfd (min). v pfd (max) to v pfd (min) v cc fall time 300 s t fb (3) 3. v pfd (min) to v ss fall time of less than t fb may cause corruption of ram data. v pfd (min) to v ss v cc fall time 10 s t r v pfd (min) to v pfd (max) v cc rise time 10 s t rb v ss to v pfd (min) v cc rise time 1 s t rec v pfd (max) to inputs recognized 40 200 ms ai01168c v cc inputs (per control input) outputs don't care high-z tf tfb tr tpd trb tdr valid valid (per control input) recognized recognized v pfd (max) v pfd (min) v so trec
m48z35av dc and ac parameters 17/24 table 10. power down/up trip points dc characteristics symbol parameter (1)(2) 1. all voltages referenced to v ss . 2. valid for ambient operating temperature: t a = 0 to 70c; v cc = 3.0 to 3.6v (except where noted). min typ max unit v pfd power-fail deselect voltage 2.7 2.9 3.0 v v so battery back-up switchover voltage v pfd ? 100mv v t dr (3) 3. at 25c, v cc = 0v. expected data retention time 10 years
package mechanical data m48z35av 18/24 5 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 12. pcdip28 ? 28-pin plastic dip, battery caphat?, package outline note: drawing is not to scale. table 11. pmdip28 ? 28-pin plastic dip, battery caphat?, pack. mech. data pcdip a2 a1 a l b1 b e1 d e n 1 c ea e3 symbol mm inches typ min max typ min max a 8.89 9.65 0.350 0.380 a1 0.38 0.76 0.015 0.030 a2 8.38 8.89 0.330 0.350 b 0.38 0.53 0.015 0.021 b1 1.14 1.78 0.045 0.070 c 0.20 0.31 0.008 0.012 d 39.37 39.88 1.550 1.570 e 17.83 18.34 0.702 0.722 e1 2.29 2.79 0.090 0.110 e3 29.72 36.32 1.170 1.430 ea 15.24 16.00 0.600 0.630 l 3.05 3.81 0.120 0.150 n28 28
m48z35av package mechanical data 19/24 figure 13. soh28 ? 28-lead plastic small outline, battery snaphat, package outline note: drawing is not to scale. table 12. soh28 ? 28-lead plastic small outline, battery snaphat, pack. mech. data soh-a e n d c l a1 1 h a cp be a2 eb symbol mm inches typ min max typ min max a 3.05 0.120 a1 0.05 0.36 0.002 0.014 a2 2.34 2.69 0.092 0.106 b 0.36 0.51 0.014 0.020 c 0.15 0.32 0.006 0.012 d 17.71 18.49 0.697 0.728 e 8.23 8.89 0.324 0.350 e 1.27 ? ? 0.050 ? ? eb 3.20 3.61 0.126 0.142 h 11.51 12.70 0.453 0.500 l 0.41 1.27 0.016 0.050 a0808 n28 28 cp 0.10 0.004
package mechanical data m48z35av 20/24 figure 14. sh ? 4-pin snaphat housing for 48mah battery, package outline note: drawing is not to scale. table 13. sh ? 4-pin snaphat housing for 48mah battery, pack. mech. data shzp-a a1 a d e ea eb a2 b l a3 symbol mm inches typ min max typ min max a9.780.385 a1 6.73 7.24 0.265 0.285 a2 6.48 6.99 0.255 0.275 a3 0.38 0.015 b 0.46 0.56 0.018 0.022 d 21.21 21.84 0.835 0.860 e 14.22 14.99 0.560 0.590 ea 15.55 15.95 0.612 0.628 eb 3.20 3.61 0.126 0.142 l 2.03 2.29 0.080 0.090
m48z35av package mechanical data 21/24 figure 15. sh ? 4-pin snaphat housing for 120mah battery, package outline note: drawing is not to scale. table 14. sh ? 4-pin snaphat housing for 120 mah battery, pack. mech. data shzp-a a1 a d e ea eb a2 b l a3 symb mm inches typ min max typ min max a 10.54 0.415 a1 8.00 8.51 0.315 0.335 a2 7.24 8.00 0.285 0.315 a3 0.38 0.015 b 0.46 0.56 0.018 0.022 d 21.21 21.84 0.835 0.860 e 17.27 18.03 0.680 0.710 ea 15.55 15.95 0.612 0.628 eb 3.20 3.61 0.126 0.142 l 2.03 2.29 0.080 0.090
part numbering m48z35av 22/24 6 part numbering table 15. ordering information scheme caution: do not place the snaphat battery package ?m4zxx-br00sh1? in conductive foam as it will drain the lithium button-cell battery. for other options, or for more information on any aspect of this device, please contact the st sales office nearest you. table 16. snaphat battery table example: m48z 35av ?10 mh 1 e device type m48z supply voltage and write protect voltage 35av = v cc = 3.0 to 3.6v; v pfd = 2.7 to 3.0v speed ?10 = 100ns (35av) package pc = pcdip28 mh (1) = soh28 1. the soic package (soh28) requires the snaphat ? battery package which is ordered separately under the part number ?m4zxx-br00s h1? in plastic tubes (see table 16 ). temperature range 1 = 0 to 70c shipping method for soh28: e = lead-free package (ecopack ? ), tubes f = lead-free package (ecopack ? ), tape & reel for pcdip28: blank = tubes part number description package m4z28-br00sh1 lithium ba ttery (48mah) snaphat sh m4z32-br00sh1 lithium battery (120mah) snaphat sh
m48z35av revision history 23/24 7 revision history table 17. document revision history date revision changes sep-1999 1.0 first issue 20-apr-2000 1.1 sh and sh28 packages for 2-pin and 2-socket removed 22-jun-2001 2.0 reformatted; added temperature information ( ta bl e 7 , 8 , 3 , 4 , 9 , 10 ) 05-jul-2001 2.1 removed reference to ?crystal? in features summary 17-dec-2001 2.2 changed speed grade designator to ??10? ( ta b l e 1 5 ) 29-may-2002 2.3 modified reflow time and temperature footnotes ( ta b l e 5 ) 03-oct-2002 2.4 update v cc for supply voltage ( ta bl e 5 ) 07-nov-2002 2.5 update absolute maximum ratings ( ta b l e 5 ) 02-apr-2003 3.0 v2.2 template applied; test condition updated ( ta bl e 1 0 ) 24-mar-2004 4.0 reformatted; updated lead-free information ( ta bl e 5 , 15 ) 09-jun-2005 5 removal of snaphat, industrial temperature sales types ( ta bl e 3 , 4 , 5 , 6 , 8 , 9 , 10 , 15 ) 05-nov-2007 6 reformatted document; added lead-free second level interconnect information to cover page and section 5: package mechanical data ; removed m48z35ay and references throughout document; updated ta b l e 2 , 3 , 4 , 5 , 6 , 8 , 9 , 15 and 16 .
m48z35av 24/24 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2007 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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